Dreamcast Technical Pages
VideoLogic's 100 MHz PowerVR Series2

It was believed that three possible choices existed for the Dreamcast's GPU:
1. Lockheed Martin's Real3D (Real3D 100 derivative) 
2. 3Dfx Interactive's Voodoo (Banshee derivative) 
3. NEC/VideoLogic's PowerVR (PVR2DC)

Timeline of Events (Oct 95 to Sept 98)
Date Event
Oct, 1995 Edge Magazine reports that Lockheed Martin is hired by SEGA to design a GPU for the Dreamcast, and VideoLogic announces that they are working on PowerVR Series 2 codenamed "Highlander" at the time.
April, 1997 Two former employees of Lockheed Martin indicate that SEGA will not be using a GPU from LM.
June, 1997 News on the net indicates competing designs for the DC: SEGA of America's Voodoo based "Black Belt" versus SEGA of Japan's PowerVR based 'Dural' mentioned on the net.
July, 1997 Microprocessor Report indicates that SEGA chooses PowerVR over Voodoo technology for Dreamcast, and SEGA cancels the contract they had with 3Dfx Interactive.
Sept, 1997 3Dfx Interactive sues SEGA and NEC for breach of contract. Also at this time one developer in Britain mentions SEGA telling Dreamcast developers who are waiting for DC development kits to begin working on PC's with a PowerVR card.
Oct, 1997 3Dfx Interactive includes Videologic in lawsuit against SEGA and NEC. Note: The lawsuit between 3Dfx and SEGA was settled out of court at a much later date and the details of the settlement was not released.
Nov, 1997 NEC/VideoLogic show the PVR2 chip (0.35 micron version running at 70 MHz) at Comdex to a small group in a private presentation.
Feb 23rd, 1998 PVR2 is officially announced by NEC/VideoLogic.
April, 1st 1998 First 0.25 micron version of the PVR2 is produced.
May 21st, 1998 SEGA introduces the Dreamcast for the first time and formally announces the inclusion of the PVR2 graphics chip.
Sept 7th, 1998 At the ECTS '98 show in London, England, NEC/VideoLogic indicate that the PVR2 chip design is done, and manufacturing begins.
Sept 10th, 1998 VideoLogic and NEC announced that mass production and deliveries to SEGA begins for the PVR2.
Sept 17th, 1998 PVR2 announced for Naomi 1 arcade board

VideoLogic PowerVR Series2
Click to Enlarge
PowerVR Series2 Features and Specifications
  • 100 MHz clock rate
  • 100 Mpixels/sec (200 to 300 Mpixels/sec deferred rendering rate) 
  • 7 million fully textured, lit and shadowed polygons per second 
  • geometry can be triangles, quads, and polygon strips 
  • full CPU load balancing 
  • tile accelerator
  • full floating-point geometry and texture setup engine
  • performance that scales up with faster CPUs
  • 32-bit accurate floating point z-buffering with no RAM accesses 
  • unified frame buffer and texture memory 
  • VQ (vector quantization) texture compression with 5:1 compression ratio (average for a set of mip-mapped textures)
  • full alpha blending modes supported 
  • image super-sampling for full scene anti-aliasing 
  • perspective correct bilinear, trilinear, and anisotropic texture filtering 
  • perspective correct ARGB gouraud shading 
  • specular highlighting with offset colours 
  • environment mapping
  • hardware translucency sorter
  • volumetric effects (shadows, lens flare, etc) 
  • multiple fog modes 
  • bump mapping 
  • full DirectX and OpenGL blending modes (back-end multi-pass rendering with micro-tile accumulation buffers) 
  • 3D in a Window 
  • max resolution of 1600 by 1200 in 24-bit color 
  • RAMDAC (230Mhz) 
  • manufactured in NEC's leading 0.25-micron process 
  • 2 to 32 MB of 100 MHz SDRAM
  • MPEG 2 decode 
  • DVD-assist

VideoLogic's website
PowerVR's website